MAX2851ITK+【PDF 22/37 页】TRANSMITTER MIMO 5GHZ 5CH 68TQFN

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Sheet目录473

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5GHz, 5-Channel MIMO Receiver

Pin Description (continued)

—

NAME

V CC_VCO

BYP_VCO

GND_VCO

CPOUT+

CPOUT-

V CC_DIG

DOUT

CLKOUT2

CLKOUT

V CC_XTAL

XTAL

XTAL_CAP

RSSI

RXBBI2+

RXBBI2-

RXBBQ2+

RXBBQ2-

V CC_BB1

RXBBI1+

RXBBI1-

RXBBQ1+

RXBBQ1-

V CC_LNA1

RXRF1+

RXRF1-

ENABLE

FUNCTION

VCO Supply Voltage. Bypass with a capacitor as close as possible to the pin.

On-Chip VCO Regulator Output Bypass. Bypass with an external 1 F F capacitor to GND_VCO with

minimum PCB trace. Do not connect other circuitry to this pin.

VCO Ground

Differential Charge-Pump Output. Connect the frequency synthesizer’s loop filter between

CPOUT+ and CPOUT- (see the Typical Operating Circuit ).

Digital Block Supply Voltage. Bypass with a capacitor as close as possible to the pin.

Data Logic Output of 4-Wire Serial Interface

Reference Clock Buffer Output 2

Reference Clock Buffer Output

Crystal Oscillator Supply Voltage. Bypass with a capacitor as close as possible to the pin.

Crystal Oscillator Base Input. AC-couple crystal unit to this pin.

Crystal Oscillator Emitter Node

Receiver Signal Strength Indicator Output

Receiver 2 Baseband I-Channel Differential Output

Receiver 2 Baseband Q-Channel Differential Output

Receiver Baseband Supply Voltage 1. Bypass with a capacitor as close as possible to the pin.

Receiver 1 Baseband I-Channel Differential Output

Receiver 1 Baseband Q-Channel Differential Output

Receiver 1 LNA Supply Voltage. Bypass with a capacitor as close as possible to the pin.

Receiver 1 LNA Differential Input. Input is DC-coupled and biased internally at 1.2V.

Enable Logic Input

Exposed Paddle. Connect to the ground plane with multiple vias for proper operation and heat

dissipation. Do not share with any other pin grounds and bypass capacitors’ ground.

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